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A research-level monograph presenting compilation and optimization techniques for reconfigurable computing systems. The book discusses architectural features of reconfigurable hardware, compiler transformations, mapping strategies, intermediate representations, and performance-driven code generation aimed at FPGAs and adaptive computing platforms. It is intended for graduate students, researchers, and practitioners working at the intersection of compilers and reconfigurable architectures.

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245: $a: Compilation Techniques for Reconfigurable Architectures
245: $b:
082: $a:
100: $a: João M. P. Cardoso & Pedro C. Diniz
650: $a: Computer Architecture
250: $a:
440: $v:
250: $b: Springer Science+Business Media, LLC
250: $c: 2009
020: $a: 978-0-387-09670-4
300: $a: 230